Idris2Doc : ControlFlow.CFG.Simple

ControlFlow.CFG.Simple

(source)
This module contains a representation of a control-flow graph that aims to
enforce the correctness of jumps between vertices of graphs, i.e., blocks
of code.
The graph model permits graphs to be incomplete and facilitates easy
composition of such graphs when they are compatible.

*This model is a simplified version of the model in `ControlFlow.CFG`,
which also allows for incomplete vertices.*

A graph is incomplete when vertices need to be added to it in order for it
to be a valid function body.
For example a graph that contains only the following pseudo-code block:
```
L0: x = call func ()
    jump L1
```
is incomplete because the code block ends with a jump to the block `L1` but
`L1` is not in the graph.

In this model, graphs can be incomplete at the beginning or at the end
(or both). In other words, graphs can be completed only by prepending or
appending vertices to them.

Reexports

importpublic ControlFlow.Edge

Definitions

Neighbors : Type->Type
  Neighbors of a vertex

Visibility: public export
Vertex : Type->Type
  A constructor of verteices of a directed graph
@ a the type of vertex identifiers
@ v the identifier of the vertex
@ ins the inputs (in-neighbors) of the vertex
@ outs the outputs (out-neighbors) of the vertex

Visibility: public export
Edges : Type->Type
  Input or output edges of an incomplete graph
@ a the type of vertex identifiers

Visibility: public export
dataCFG : Vertexa->Edgesa->Edgesa->Type
  A potentially incomplete control flow graph.
@ ins edges from "to be defined" vertices to vertices in the graph
@ outs edges from vertices in the graph to "to be defined" vertices
@ vertex constructor of vertex types.

Totality: total
Visibility: public export
Constructors:
Empty : CFGvertexedgesedges
  An empty graph
SingleVertex : vertexvvinsvouts->CFGvertex (vins~~>v) (v~>>vouts)
  A singleton graph - a graph containing a single vertex
Cycle : CFGvertex (ins++loopOuts) (loopIns++outs) ->CFGvertexloopInsloopOuts->CFGvertexinsouts
  A graph that represents a while loop
@ node the graph in which the while condition is computed
@ loop the body of the loop
Series : CFGvertexinsedges->CFGvertexedgesouts->CFGvertexinsouts
  A sequential connection of two graphs
The output vertices of one (`pre`) are being connected to the input
vertices of the other (`post`)
@ pre the predecessor of `post`
@ post the successor of `pre`
Parallel : CFGvertexinsouts->CFGvertexins'outs'->CFGvertex (ins++ins') (outs++outs')
  A parallel connection of graphs
Two graphs are combined into one without any connections beetween them
The result has the inputs and outputs of both
@ left the left sub-graph
@ right the right sub-graph
IFlip : CFGvertex (ins++ins') outs->CFGvertex (ins'++ins) outs
  Used to flip the inputs of a graph to make it connectable with another
OFlip : CFGvertexins (outs++outs') ->CFGvertexins (outs'++outs)
  Used to flip the outputs of a graph to make it connectable with another
(|-|) : CFGvertexinsouts->CFGvertexins'outs'->CFGvertex (ins++ins') (outs++outs')
  Alias for `Parallel`

Visibility: public export
Fixity Declarations:
infixr operator, level 4
infixr operator, level 4
(*->) : CFGvertexinsedges->CFGvertexedgesouts->CFGvertexinsouts
  Alias for `Series`

Visibility: public export
Fixity Declarations:
infixr operator, level 5
infixr operator, level 5
prepend : vertexvvinsvouts->CFGvertex (v~>>vouts) gouts->CFGvertex (vins~~>v) gouts
Visibility: public export
append : CFGvertexgins (vins~~>v) ->vertexvvinsvouts->CFGvertexgins (v~>>vouts)
Visibility: public export
lbranch : CFGvertexins (ls++rs) ->CFGvertexlsls'->CFGvertexins (ls'++rs)
  A partial sequential connection of two graphs
The left outputs of the predecessor are connected with all inputs of
the successor
@ node the predecessor of `branch`
@ branch the (partial) successor of `node`
@ ls the left outputs of `node` / the inputs of `branch`
@ rs the right outputs of `node`

Visibility: public export
rbranch : CFGvertexins (ls++rs) ->CFGvertexrsrs'->CFGvertexins (ls++rs')
  A partial sequential connection of two graphs
The right outputs of the predecessor are connected with all inputs of
the successor
@ node the predecessor of `branch`
@ branch the (partial) successor of `node`
@ ls the left outputs of `node`
@ rs the right outputs of `node` / the inputs of `branch`

Visibility: public export
lmerge : CFGvertexlsls'->CFGvertex (ls'++rs) outs->CFGvertex (ls++rs) outs
  A partial sequential connection of two graphs
All outputs of the predecessor are connected with the left inputs of
the successor
@ branch the predecessor of `node`
@ node the (partial) successor of `branch`
@ ls' the left inputs of `node` / the outputs of `branch`
@ rs the right inputs of `node`

Visibility: public export
rmerge : CFGvertexrsrs'->CFGvertex (ls++rs') outs->CFGvertex (ls++rs) outs
  A partial sequential connection of two graphs
All outputs of the predecessor are connected with the right inputs of
the successor
@ branch the predecessor of `node`
@ node the (partial) successor of `branch`
@ ls the left inputs of `node`
@ rs' the right inputs of `node` / the outputs of `branch`

Visibility: public export
initGraph : vertexvinsouts->CFGvertex (ins~~>v) (v~>>outs)
Visibility: export
vmap : (vertexvvinsvouts->vertex'vvinsvouts) ->CFGvertexinsouts->CFGvertex'insouts
  Apply a function to all vertices in a grpaph

Visibility: export